Lead CPU Design Engineer
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Job Title: Lead CPU Design Engineer
Location: Hybrid
Employment Type: Full-time
About the Role
We are seeking an experienced Technical Lead to guide the development of our best-in-class RISC-V processors. Joining a team of world-class experts, you will define micro-architectural solutions for complex Out-of-Order (OoO) subsystems and provide technical mentorship to the design team. You will be responsible for the technical integrity of the design and project execution, without the overhead of people management.
Responsibilities
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Technical Leadership: Drive the micro-architecture definition for complex Out-of-Order CPU subsystems (e.g., Instruction Scheduling, Register Renaming, Branch Prediction).
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Architecture Definition: Translate high-level system requirements into detailed micro-architectural specifications.
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Mentorship: Provide technical guidance and code reviews for other engineers, establishing best practices in RTL design.
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Project Execution: Own the schedule for major blocks, track technical progress, and identify risks early.
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Performance Tuning: Analyze performance bottlenecks and drive architectural improvements to maximize IPC (Instructions Per Cycle).
Qualifications
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Bachelor's, Master's, or PhD in Computer Science or Electrical Engineering.
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8+ years of experience in high-performance RTL design.
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Proven track record of taking complex IP blocks from concept to tape-out.
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Expert-level knowledge of SystemVerilog.
Preferred Qualifications
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Deep expertise in Out-of-Order execution microarchitecture and superscalar processor design.
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Experience with advanced branch prediction techniques or speculative execution.
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Experience with high-performance memory subsystems and cache coherency protocols.
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Previous experience as a technical lead in a CPU design team.
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Hands-on experience with RISC-V vector extensions (RVV) is a plus, but not required.
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Apply by sending your CV to: ana.matijevic@chipfy.ai
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